Silicon carbide substrates are widely used for manufacturing power devices designed to operate at high voltage, high temperature and high switching frequency. However, the electrical advantages of SiC can only be fully realized when the substrate and epitaxial layers have sufficiently low crystallographic defect densities.
Among the defects associated with SiC crystal growth, micropipes and basal plane dislocations are particularly important. Although they differ greatly in structure and behavior, both can reduce device yield, affect electrical performance and create long-term reliability risks.
Understanding these defects helps device manufacturers, epitaxy suppliers and substrate buyers evaluate whether a SiC wafer is suitable for Schottky diodes, MOSFETs, bipolar devices and other demanding semiconductor applications.
A micropipe is a hollow-core crystallographic defect that commonly develops around a screw dislocation with a large Burgers vector. Instead of forming a closed dislocation core at the atomic scale, the crystal contains a narrow hollow channel extending through part or all of the SiC boule.
The defect generally grows approximately along the crystallographic c-axis and may intersect the polished wafer surface.
Because a micropipe has an actual hollow core, it is more severe than an ordinary threading dislocation. It creates a local region where the crystal structure and electrical properties are substantially disrupted.
Micropipes were once among the primary limitations affecting commercial SiC substrates. Improvements in physical vapor transport growth, seed quality and thermal-field control have significantly reduced micropipe densities in modern commercial wafers. Nevertheless, micropipe inspection remains important for high-voltage and large-area devices because even a small number of killer defects can reduce fabrication yield.
Micropipes can affect a device in several ways.
A micropipe disturbs the electric field distribution inside the device. When a high reverse voltage is applied, the electric field may concentrate around the defect.
This local field enhancement can cause the device to break down at a voltage substantially below its intended rating.
The effect is especially serious in high-voltage devices because the active device area is larger and the probability of encountering a critical substrate defect increases.
The hollow core and surrounding lattice distortion may create leakage paths through the substrate and epitaxial structure.
Devices located near micropipes can therefore exhibit elevated reverse leakage current, unstable blocking characteristics or failure during electrical screening.
A micropipe may affect the complete vertical device structure above its position. Any die fabricated directly over the defect may need to be rejected.
For large-area devices, a single micropipe can make the entire die unusable. Therefore, reducing micropipe density is essential for improving usable device area and lowering manufacturing cost.
Defects in a SiC substrate can propagate into a homoepitaxial layer grown on the wafer. Screw-related substrate defects may therefore influence the morphology and crystalline quality of the overgrown epilayer.
Research on SiC epitaxy has shown that substrate dislocations can replicate or transform as the epitaxial layer grows, which is why substrate defect quality remains relevant even after epitaxial deposition.
A basal plane dislocation, commonly abbreviated as BPD, is a dislocation that lies mainly within the basal plane of the hexagonal SiC crystal.
In 4H-SiC, the basal plane corresponds to the crystallographic plane perpendicular to the c-axis. Unlike threading dislocations, which extend approximately through the wafer thickness, BPDs can travel laterally through the crystal.
BPDs can originate during physical vapor transport crystal growth because of thermal stress, nonuniform temperature distribution or strain relaxation. Research indicates that thermoelastic stress in the growing crystal can promote the nucleation and multiplication of BPDs, particularly when the resolved shear stress along the basal plane becomes sufficiently high.
They may also be associated with stress introduced during cooling, slicing, grinding or other wafer-processing steps.
BPDs are especially important because they can affect both bipolar and unipolar SiC devices.
One of the most significant risks associated with a basal plane dislocation is its ability to act as a source for stacking-fault expansion.
When bipolar current flows through a SiC device, electron-hole recombination near a BPD can provide energy that allows a stacking fault to expand through the epitaxial layer.
The enlarged stacking fault changes the local electronic structure and creates a region with degraded carrier transport.
Stacking-fault expansion can increase the forward voltage of a bipolar SiC device during operation. This phenomenon is commonly called bipolar degradation.
It has historically been a major reliability concern for devices such as:
As the stacking fault expands, the effective conducting area can decrease and the device on-state resistance may rise.
The device may initially pass electrical testing but gradually exhibit degraded performance after prolonged current injection.
Although SiC MOSFETs are classified as unipolar devices, their intrinsic body diodes conduct bipolar current.
When the body diode operates for an extended period, BPD-related stacking-fault expansion may cause forward-voltage drift or increased on-resistance.
Modern device structures and epitaxial processes have reduced this risk significantly, but BPD density remains an important consideration when MOSFET body-diode operation is expected.
BPDs and associated stacking faults can modify local carrier lifetime, recombination behavior and current flow.
Depending on their position and interaction with other defects, they may contribute to:
A BPD does not necessarily cause immediate catastrophic failure. Its impact depends on device type, current conditions, epitaxial structure and whether the dislocation remains in the basal plane or converts into another dislocation type.
During 4H-SiC epitaxial growth, a BPD originating in the substrate may behave in two main ways.
It may:
Conversion into a threading edge dislocation is usually preferred because a threading edge dislocation is less likely to generate an expanding basal-plane stacking fault under bipolar current.
Studies of 4H-SiC epitaxy have observed substrate BPDs converting into threading edge dislocations near the interface. The conversion behavior is influenced by step-flow growth and epitaxial conditions.
Important process variables may include:
For this reason, device-grade SiC quality cannot be evaluated solely by examining the substrate. The substrate and epitaxial layer must be considered as an integrated material system.
Although both are crystallographic defects, micropipes and BPDs create different device risks.
| Characteristic | Micropipe | Basal Plane Dislocation |
|---|---|---|
| Basic structure | Hollow-core screw-related defect | Dislocation lying mainly in the basal plane |
| Typical orientation | Approximately along the c-axis | Primarily lateral within the basal plane |
| Main concern | Immediate killer defect | Progressive degradation and reliability |
| Typical device effect | Leakage and premature breakdown | Stacking-fault expansion and forward-voltage drift |
| Impact on yield | Frequently causes direct die rejection | May cause delayed or operating-condition-dependent failure |
| Epitaxial behavior | Can propagate through the epitaxial structure | May propagate or convert into a threading edge dislocation |
| Most sensitive devices | High-voltage and large-area devices | Bipolar devices and MOSFET body diodes |
In simple terms, micropipes are often associated with immediate manufacturing yield loss, while BPDs are more closely associated with operational degradation and long-term reliability.
However, the actual effect of either defect depends on its location, size, surrounding stress field and relationship to the active device structure.
No single inspection method provides complete information about every SiC defect. Manufacturers often combine several techniques.
Molten potassium hydroxide etching selectively reveals dislocations as etch pits on the SiC surface.
Micropipes, threading screw dislocations, threading edge dislocations and basal plane dislocations can produce etch features with different shapes and sizes.
KOH etching is useful for defect-density measurement and research, but it is destructive because it modifies the wafer surface. A study of etched 6H-SiC demonstrated that optimized molten-KOH conditions can reveal micropipes and multiple dislocation types.
X-ray topography is a nondestructive technique that maps lattice distortion caused by crystallographic defects.
It can reveal:
Synchrotron X-ray topography provides particularly detailed defect images and is widely used in advanced SiC crystal research and defect-mechanism analysis.
Stress fields around dislocations change the optical response of the crystal. Polarized-light imaging can therefore be used to visualize dislocations and residual-stress patterns nondestructively.
Recent work has highlighted polarized-light observation as a rapid method for defect visualization and automated wafer-quality inspection.
Photoluminescence imaging is frequently used to inspect SiC epitaxial layers.
It can detect electrically active defects and help identify stacking faults, BPD-related features and other epitaxial imperfections.
Different excitation wavelengths may be selected to inspect different depths or defect types.
Because micropipes contain hollow cores, some can be observed using optical or infrared transmission methods.
Automated optical inspection systems may be used for whole-wafer defect mapping, although their detection capability depends on defect dimensions, wafer thickness and image contrast.
Final device testing provides additional evidence of substrate and epitaxial defect effects.
Correlating defect maps with electrical results can reveal whether a particular defect is associated with:
A lower total dislocation density is generally desirable, but a single density number does not fully describe substrate quality.
Two wafers with similar overall defect densities may deliver different device yields because the defects have different types and spatial distributions.
Important considerations include:
A wafer intended for many small devices may tolerate a defect distribution that would be unacceptable for a small number of large high-voltage dies.
Therefore, substrate specifications should be evaluated in relation to the planned device architecture and die dimensions.
When purchasing SiC substrates for epitaxy or device fabrication, buyers should not rely only on diameter, thickness and doping.
The following defect-related information should also be discussed with the supplier.
Request the maximum or typical micropipe density and clarify whether the value applies to the complete wafer, the usable area or selected measurement points.
For demanding applications, a micropipe-free specification within the active area may be required.
Ask how BPD density is measured and whether the reported value refers to the substrate, an epitaxial layer or both.
The measurement technique should be stated because etching, X-ray topography and optical methods may not produce directly interchangeable results.
BPDs should be evaluated together with:
The conversion of BPDs into threading dislocations during epitaxy makes this combined assessment particularly important.
For high-value applications, request a wafer-level defect map rather than only an average density.
A defect map makes it easier to identify clusters, edge-related defects and regions suitable for large-area dies.
Confirm that the substrate orientation, off-cut angle, surface finish and defect level are suitable for the intended epitaxial process.
The propagation and conversion of BPDs can depend on epitaxial growth conditions, including C/Si ratio and growth rate.
The purchase specification should define:
Without consistent inspection criteria, defect-density numbers from different suppliers may be difficult to compare.
Reducing micropipes and BPDs requires control throughout boule growth and wafer manufacturing.
Important strategies include:
Micropipe reduction has benefited greatly from improved growth technology and seed selection.
BPD reduction remains more complex because BPDs can nucleate and multiply under thermoelastic stress during boule growth. They may also propagate differently depending on epitaxial conditions.
The acceptable defect specification depends on the end use.
Micropipes and other defects that increase leakage or lower breakdown voltage are critical.
Because Schottky devices rely primarily on majority-carrier transport, BPD-related bipolar degradation is generally less direct than in PiN diodes. However, substrate and epilayer defects can still affect yield and reliability.
Low micropipe density is necessary for high breakdown yield.
BPD control is also important when the intrinsic body diode will conduct during converter operation or reliability testing.
BPD density is especially important because bipolar current injection can trigger stacking-fault expansion and forward-voltage degradation.
Large dies have a greater probability of intersecting a killer defect.
These applications generally require stricter defect specifications and more detailed whole-wafer mapping.
Test-grade or research-grade substrates may tolerate higher defect densities when the objective is equipment testing, process development or noncritical material research.
However, the defect grade should still be documented so that experimental results can be interpreted correctly.
Micropipes and basal plane dislocations affect SiC substrate performance through different physical mechanisms.
Micropipes are hollow-core defects that can create severe leakage, premature breakdown and immediate die-yield loss. Basal plane dislocations are planar crystallographic defects that may propagate into the epitaxial layer or initiate stacking-fault expansion under bipolar current.
For SiC power devices, substrate quality should therefore be evaluated using more than a general defect-density specification. Buyers should consider defect type, spatial distribution, inspection method, epitaxial behavior and the sensitivity of the intended device structure.
As SiC wafer manufacturing continues to improve, lower micropipe density and better BPD management are helping device manufacturers achieve higher yield, more stable electrical performance and longer operating reliability.
Micropipe densities in modern commercial SiC substrates are much lower than those in earlier generations of material. Nevertheless, inspection remains important because a single micropipe can affect a large high-voltage device.
Not necessarily. Its effect depends on whether it propagates into the active epilayer, converts into a threading dislocation or promotes stacking-fault expansion during operation.
Bipolar current injection can stimulate the expansion of stacking faults originating from BPDs. This may increase forward voltage and degrade device performance over time.
Some substrate BPDs can convert into threading edge dislocations near the substrate-epilayer interface. Epitaxial process optimization can increase the conversion rate, but it does not physically eliminate every crystallographic defect.
The appropriate method depends on the wafer and application. X-ray topography provides detailed nondestructive defect mapping, KOH etching provides clear dislocation etch pits, and photoluminescence is widely used for epitaxial-layer inspection.
A complete inquiry should specify wafer diameter, polytype, conductivity type, doping, orientation, off-cut angle, thickness, polishing, surface roughness, micropipe density, dislocation requirements, edge exclusion, inspection method, quantity and intended application.
Silicon carbide substrates are widely used for manufacturing power devices designed to operate at high voltage, high temperature and high switching frequency. However, the electrical advantages of SiC can only be fully realized when the substrate and epitaxial layers have sufficiently low crystallographic defect densities.
Among the defects associated with SiC crystal growth, micropipes and basal plane dislocations are particularly important. Although they differ greatly in structure and behavior, both can reduce device yield, affect electrical performance and create long-term reliability risks.
Understanding these defects helps device manufacturers, epitaxy suppliers and substrate buyers evaluate whether a SiC wafer is suitable for Schottky diodes, MOSFETs, bipolar devices and other demanding semiconductor applications.
A micropipe is a hollow-core crystallographic defect that commonly develops around a screw dislocation with a large Burgers vector. Instead of forming a closed dislocation core at the atomic scale, the crystal contains a narrow hollow channel extending through part or all of the SiC boule.
The defect generally grows approximately along the crystallographic c-axis and may intersect the polished wafer surface.
Because a micropipe has an actual hollow core, it is more severe than an ordinary threading dislocation. It creates a local region where the crystal structure and electrical properties are substantially disrupted.
Micropipes were once among the primary limitations affecting commercial SiC substrates. Improvements in physical vapor transport growth, seed quality and thermal-field control have significantly reduced micropipe densities in modern commercial wafers. Nevertheless, micropipe inspection remains important for high-voltage and large-area devices because even a small number of killer defects can reduce fabrication yield.
Micropipes can affect a device in several ways.
A micropipe disturbs the electric field distribution inside the device. When a high reverse voltage is applied, the electric field may concentrate around the defect.
This local field enhancement can cause the device to break down at a voltage substantially below its intended rating.
The effect is especially serious in high-voltage devices because the active device area is larger and the probability of encountering a critical substrate defect increases.
The hollow core and surrounding lattice distortion may create leakage paths through the substrate and epitaxial structure.
Devices located near micropipes can therefore exhibit elevated reverse leakage current, unstable blocking characteristics or failure during electrical screening.
A micropipe may affect the complete vertical device structure above its position. Any die fabricated directly over the defect may need to be rejected.
For large-area devices, a single micropipe can make the entire die unusable. Therefore, reducing micropipe density is essential for improving usable device area and lowering manufacturing cost.
Defects in a SiC substrate can propagate into a homoepitaxial layer grown on the wafer. Screw-related substrate defects may therefore influence the morphology and crystalline quality of the overgrown epilayer.
Research on SiC epitaxy has shown that substrate dislocations can replicate or transform as the epitaxial layer grows, which is why substrate defect quality remains relevant even after epitaxial deposition.
A basal plane dislocation, commonly abbreviated as BPD, is a dislocation that lies mainly within the basal plane of the hexagonal SiC crystal.
In 4H-SiC, the basal plane corresponds to the crystallographic plane perpendicular to the c-axis. Unlike threading dislocations, which extend approximately through the wafer thickness, BPDs can travel laterally through the crystal.
BPDs can originate during physical vapor transport crystal growth because of thermal stress, nonuniform temperature distribution or strain relaxation. Research indicates that thermoelastic stress in the growing crystal can promote the nucleation and multiplication of BPDs, particularly when the resolved shear stress along the basal plane becomes sufficiently high.
They may also be associated with stress introduced during cooling, slicing, grinding or other wafer-processing steps.
BPDs are especially important because they can affect both bipolar and unipolar SiC devices.
One of the most significant risks associated with a basal plane dislocation is its ability to act as a source for stacking-fault expansion.
When bipolar current flows through a SiC device, electron-hole recombination near a BPD can provide energy that allows a stacking fault to expand through the epitaxial layer.
The enlarged stacking fault changes the local electronic structure and creates a region with degraded carrier transport.
Stacking-fault expansion can increase the forward voltage of a bipolar SiC device during operation. This phenomenon is commonly called bipolar degradation.
It has historically been a major reliability concern for devices such as:
As the stacking fault expands, the effective conducting area can decrease and the device on-state resistance may rise.
The device may initially pass electrical testing but gradually exhibit degraded performance after prolonged current injection.
Although SiC MOSFETs are classified as unipolar devices, their intrinsic body diodes conduct bipolar current.
When the body diode operates for an extended period, BPD-related stacking-fault expansion may cause forward-voltage drift or increased on-resistance.
Modern device structures and epitaxial processes have reduced this risk significantly, but BPD density remains an important consideration when MOSFET body-diode operation is expected.
BPDs and associated stacking faults can modify local carrier lifetime, recombination behavior and current flow.
Depending on their position and interaction with other defects, they may contribute to:
A BPD does not necessarily cause immediate catastrophic failure. Its impact depends on device type, current conditions, epitaxial structure and whether the dislocation remains in the basal plane or converts into another dislocation type.
During 4H-SiC epitaxial growth, a BPD originating in the substrate may behave in two main ways.
It may:
Conversion into a threading edge dislocation is usually preferred because a threading edge dislocation is less likely to generate an expanding basal-plane stacking fault under bipolar current.
Studies of 4H-SiC epitaxy have observed substrate BPDs converting into threading edge dislocations near the interface. The conversion behavior is influenced by step-flow growth and epitaxial conditions.
Important process variables may include:
For this reason, device-grade SiC quality cannot be evaluated solely by examining the substrate. The substrate and epitaxial layer must be considered as an integrated material system.
Although both are crystallographic defects, micropipes and BPDs create different device risks.
| Characteristic | Micropipe | Basal Plane Dislocation |
|---|---|---|
| Basic structure | Hollow-core screw-related defect | Dislocation lying mainly in the basal plane |
| Typical orientation | Approximately along the c-axis | Primarily lateral within the basal plane |
| Main concern | Immediate killer defect | Progressive degradation and reliability |
| Typical device effect | Leakage and premature breakdown | Stacking-fault expansion and forward-voltage drift |
| Impact on yield | Frequently causes direct die rejection | May cause delayed or operating-condition-dependent failure |
| Epitaxial behavior | Can propagate through the epitaxial structure | May propagate or convert into a threading edge dislocation |
| Most sensitive devices | High-voltage and large-area devices | Bipolar devices and MOSFET body diodes |
In simple terms, micropipes are often associated with immediate manufacturing yield loss, while BPDs are more closely associated with operational degradation and long-term reliability.
However, the actual effect of either defect depends on its location, size, surrounding stress field and relationship to the active device structure.
No single inspection method provides complete information about every SiC defect. Manufacturers often combine several techniques.
Molten potassium hydroxide etching selectively reveals dislocations as etch pits on the SiC surface.
Micropipes, threading screw dislocations, threading edge dislocations and basal plane dislocations can produce etch features with different shapes and sizes.
KOH etching is useful for defect-density measurement and research, but it is destructive because it modifies the wafer surface. A study of etched 6H-SiC demonstrated that optimized molten-KOH conditions can reveal micropipes and multiple dislocation types.
X-ray topography is a nondestructive technique that maps lattice distortion caused by crystallographic defects.
It can reveal:
Synchrotron X-ray topography provides particularly detailed defect images and is widely used in advanced SiC crystal research and defect-mechanism analysis.
Stress fields around dislocations change the optical response of the crystal. Polarized-light imaging can therefore be used to visualize dislocations and residual-stress patterns nondestructively.
Recent work has highlighted polarized-light observation as a rapid method for defect visualization and automated wafer-quality inspection.
Photoluminescence imaging is frequently used to inspect SiC epitaxial layers.
It can detect electrically active defects and help identify stacking faults, BPD-related features and other epitaxial imperfections.
Different excitation wavelengths may be selected to inspect different depths or defect types.
Because micropipes contain hollow cores, some can be observed using optical or infrared transmission methods.
Automated optical inspection systems may be used for whole-wafer defect mapping, although their detection capability depends on defect dimensions, wafer thickness and image contrast.
Final device testing provides additional evidence of substrate and epitaxial defect effects.
Correlating defect maps with electrical results can reveal whether a particular defect is associated with:
A lower total dislocation density is generally desirable, but a single density number does not fully describe substrate quality.
Two wafers with similar overall defect densities may deliver different device yields because the defects have different types and spatial distributions.
Important considerations include:
A wafer intended for many small devices may tolerate a defect distribution that would be unacceptable for a small number of large high-voltage dies.
Therefore, substrate specifications should be evaluated in relation to the planned device architecture and die dimensions.
When purchasing SiC substrates for epitaxy or device fabrication, buyers should not rely only on diameter, thickness and doping.
The following defect-related information should also be discussed with the supplier.
Request the maximum or typical micropipe density and clarify whether the value applies to the complete wafer, the usable area or selected measurement points.
For demanding applications, a micropipe-free specification within the active area may be required.
Ask how BPD density is measured and whether the reported value refers to the substrate, an epitaxial layer or both.
The measurement technique should be stated because etching, X-ray topography and optical methods may not produce directly interchangeable results.
BPDs should be evaluated together with:
The conversion of BPDs into threading dislocations during epitaxy makes this combined assessment particularly important.
For high-value applications, request a wafer-level defect map rather than only an average density.
A defect map makes it easier to identify clusters, edge-related defects and regions suitable for large-area dies.
Confirm that the substrate orientation, off-cut angle, surface finish and defect level are suitable for the intended epitaxial process.
The propagation and conversion of BPDs can depend on epitaxial growth conditions, including C/Si ratio and growth rate.
The purchase specification should define:
Without consistent inspection criteria, defect-density numbers from different suppliers may be difficult to compare.
Reducing micropipes and BPDs requires control throughout boule growth and wafer manufacturing.
Important strategies include:
Micropipe reduction has benefited greatly from improved growth technology and seed selection.
BPD reduction remains more complex because BPDs can nucleate and multiply under thermoelastic stress during boule growth. They may also propagate differently depending on epitaxial conditions.
The acceptable defect specification depends on the end use.
Micropipes and other defects that increase leakage or lower breakdown voltage are critical.
Because Schottky devices rely primarily on majority-carrier transport, BPD-related bipolar degradation is generally less direct than in PiN diodes. However, substrate and epilayer defects can still affect yield and reliability.
Low micropipe density is necessary for high breakdown yield.
BPD control is also important when the intrinsic body diode will conduct during converter operation or reliability testing.
BPD density is especially important because bipolar current injection can trigger stacking-fault expansion and forward-voltage degradation.
Large dies have a greater probability of intersecting a killer defect.
These applications generally require stricter defect specifications and more detailed whole-wafer mapping.
Test-grade or research-grade substrates may tolerate higher defect densities when the objective is equipment testing, process development or noncritical material research.
However, the defect grade should still be documented so that experimental results can be interpreted correctly.
Micropipes and basal plane dislocations affect SiC substrate performance through different physical mechanisms.
Micropipes are hollow-core defects that can create severe leakage, premature breakdown and immediate die-yield loss. Basal plane dislocations are planar crystallographic defects that may propagate into the epitaxial layer or initiate stacking-fault expansion under bipolar current.
For SiC power devices, substrate quality should therefore be evaluated using more than a general defect-density specification. Buyers should consider defect type, spatial distribution, inspection method, epitaxial behavior and the sensitivity of the intended device structure.
As SiC wafer manufacturing continues to improve, lower micropipe density and better BPD management are helping device manufacturers achieve higher yield, more stable electrical performance and longer operating reliability.
Micropipe densities in modern commercial SiC substrates are much lower than those in earlier generations of material. Nevertheless, inspection remains important because a single micropipe can affect a large high-voltage device.
Not necessarily. Its effect depends on whether it propagates into the active epilayer, converts into a threading dislocation or promotes stacking-fault expansion during operation.
Bipolar current injection can stimulate the expansion of stacking faults originating from BPDs. This may increase forward voltage and degrade device performance over time.
Some substrate BPDs can convert into threading edge dislocations near the substrate-epilayer interface. Epitaxial process optimization can increase the conversion rate, but it does not physically eliminate every crystallographic defect.
The appropriate method depends on the wafer and application. X-ray topography provides detailed nondestructive defect mapping, KOH etching provides clear dislocation etch pits, and photoluminescence is widely used for epitaxial-layer inspection.
A complete inquiry should specify wafer diameter, polytype, conductivity type, doping, orientation, off-cut angle, thickness, polishing, surface roughness, micropipe density, dislocation requirements, edge exclusion, inspection method, quantity and intended application.
english
français
Deutsch
Italiano
Русский
Español
português
Nederlandse
ελληνικά
日本語
한국
العربية
Türkçe
polski